If-Then-Else

Library

Events

Description

One event is generated on one of the output event ports when an input event arrives. Depending on the sign of the regular input, the event is generated on the first or second output. This is a synchro block, i.e., input and output event are synchronized.

Dialog Box

Set parameters
Inherit (1: no, 0: yes)	1
zero-crossing (0: no, 1: yes)	1

• Inherit : YYYY
• zero-crossing : YYYY

Default properties

• always active: no
• direct-feedthrough: yes
• zero-crossing: yes
• mode: yes
• number/sizes of inputs: 1 / 1
• number/sizes of outputs: 0 /
• number/sizes of activation inputs: 1 / 1
• number/sizes of activation outputs: 2 / 1 1
• continuous-time state: no
• discrete-time state: no
• name of computational function: ifthel

Interfacing function

scilab/macros/scicos_blocks/events/IFTHEL_f.sci

Computational function (type -1)

      subroutine ifthel(flag,nevprt,ntvec,rpar,nrpar,ipar,nipar,u,nu)
c     Scicos block simulator
c     if-then-else block
c     if event input exits from then or else clock ouputs based
c     on the sign of the unique input (if input>0 then  else )
c
c     Copyright INRIA
      double precision rpar(*),u(*)
      integer flag,nevprt,nx,nz,ntvec,nrpar,ipar(*)
      integer nipar,nu

c
      common /dbcos/ idb
c
      if(idb.eq.1) then
         write(6,'(''ifthel     t='',e10.3,'' flag='',i1)') t,flag
      endif
c
      if(flag.eq.3) then
         if(u(1).le.0.d0) then
            ntvec=2
         else
            ntvec=1
         endif
      endif
      end